FPGA:LED灯亮灭实验
LED.v文件`timescale 1ns/1ps //时间单位:1ns,精度:1ps module LED (  input clk,  output led );   parameter count_s = 26'd50_000_000; //50M晶振时钟,一个周期20ns reg [25:0] time_count = 26'd0;      //时钟计数器,2^26 = 67108864 reg led_r = 1'b0;   always@(posedge clk)  if(time_count >= count_s - 1)    begin      time_count <= 26'd0;      led_r <= ~led_r;    end  else time_count [removed]
765432lK080h
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